ADC / DAC Converter Calculator

Every analog-to-digital and digital-to-analog converter is defined by two numbers: how many bits it resolves and what reference voltage it measures against. This calculator turns those two into everything else you need when scaling a reading in firmware — the LSB step size, the quantized code an input voltage produces (in decimal, binary and hex), the voltage a DAC reconstructs from a code, and how much resolution you are actually losing to quantization.

How to use it

1. Set the resolution in bits — 8, 10, 12 and 16 cover most microcontroller ADCs; 24 and 32 cover audio and precision sigma-delta parts.
2. Enter the reference voltage (Vref). This is the converter's full-scale span, not the supply rail — many parts run at 3.3 V but measure against an internal 2.5 V or 1.2 V reference.
3. Enter an analog input (Vin) to see the code an ADC would produce for it.
4. Enter a digital code to see the voltage a DAC would output for it.

Settings

• Full-scale convention — Vref / 2^N is the standard definition and is what almost every ADC datasheet uses: the maximum code sits one LSB below Vref. Vref / (2^N − 1) puts the maximum code exactly at Vref instead, which some DAC and PWM scaling code assumes. Picking the wrong one gives you a one-LSB error at full scale.
• ADC quantization — real ADCs truncate: any voltage within a step maps to the code below it. Round-to-nearest models the ideal transfer function with a half-LSB offset applied, which is what you get after calibration on many parts.

The formulas

• Levels = 2^N, max code = 2^N − 1
• LSB = Vref / 2^N (or Vref / (2^N − 1))
• ADC code = floor(Vin / LSB), clamped to 0 … max code
• Reconstructed voltage = code × LSB
• Quantization error = Vin − reconstructed voltage, bounded by ±½ LSB
• Ideal SNR (SQNR) = 6.02 × N + 1.76 dB

FAQ

Why does one extra bit only buy 6 dB?

Each bit halves the LSB, which halves the quantization noise — a factor of two in amplitude is 6.02 dB. That is why the ideal SNR figure moves in ~6 dB steps: a 12-bit converter tops out around 74 dB no matter how clean the rest of your signal chain is.

My readings are noisy in the last two bits — is that quantization?

Usually not. Quantization error is deterministic and bounded by half an LSB; noise that wanders over several counts is normally reference noise, ground bounce, or an input impedance mismatch with the ADC's sample-and-hold. Compare the wander against the ±½ LSB figure this calculator reports — if it is much larger, the converter's resolution is not your limit.

Does this model offset, gain error or INL?

No — this is ideal quantization math, which is what you want for firmware scaling checks and for comparing resolution and reference-voltage choices. Real-world offset, gain error, integral/differential non-linearity and noise come from the part's datasheet and stack on top of these numbers.

Related tools

For the resistor divider that usually sits in front of an ADC input, use the Voltage Divider Calculator. If you're driving an analog level with a filtered PWM output instead of a DAC, the PWM Duty Cycle & Frequency Calculator covers that side. To convert a raw code into another base by hand, see the Integer Base Converter.

Privacy

All calculations run entirely in your browser — nothing you enter is sent to a server.